发明名称 |
SYSTEM AND METHOD FOR TERMINATING LOCK-STEP SEQUENCES IN A MULTIPROCESSOR SYSTEM |
摘要 |
There is provided, for use in a processing system containing a plurality of processors coupled to a main memory, a control circuit for perturbing a lock-step sequence of memory requests received from the processors. The control circuit comprises a memory request generator for generating at least one memory request operable to terminate the lock-step sequence of memory requests. |
申请公布号 |
EP1029276(B1) |
申请公布日期 |
2004.03.31 |
申请号 |
EP19980953560 |
申请日期 |
1998.10.14 |
申请人 |
INTEL CORPORATION |
发明人 |
MILLER, ROBERT, J.;MCDONALD, EDWARD, A. |
分类号 |
G06F9/46;G06F11/07;G06F13/16;(IPC1-7):G06F12/00;G06F13/20;G06F13/26;G06F13/00;G06F13/34 |
主分类号 |
G06F9/46 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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