发明名称 Processor executing simd instructions
摘要 <p>The processor has a decoding unit (20) to decode an instruction for making a judgment on the results of a single instruction multiple data (SIMD) compare instruction executed on multimedia data. An operation unit (40) is provided to judge whether the obtained comparison results are all zero, and to execute the instruction based on a result of decoding performed by the decoding unit.</p>
申请公布号 EP1403762(A2) 申请公布日期 2004.03.31
申请号 EP20030020559 申请日期 2003.09.17
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 TANAKA, TETSUYA;OKABAYASHI, HAZUKI;HEISHI, TAKETO;OGAWA, HAJIME;SUZUKI, TSUNEYUKI;KIYOHARA, TOKUZO;TANAKA, TAKESHI;NISHIDA, HIDESHI;MAEDA, MASAKI
分类号 G06F7/00;G06F9/00;G06F9/30;G06F9/302;G06F9/305;G06F9/38;(IPC1-7):G06F9/30 主分类号 G06F7/00
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