发明名称 APPARATUS FOR ARRANGING SDH MODE DATA AND METHOD THEREFOR
摘要 PURPOSE: An apparatus for arranging SDH(Synchronous Digital Hierarchy) mode data and a method therefor are provided to arrange inputted data according to each mode and optimize the entire gate required in data arrangement. CONSTITUTION: A signal expanding unit(10) receives SDH data with one bit or two bits, expands the received SDH data, and outputs parallel data. A retrieving unit(50) retrieves the parallel data outputted from the signal expanding unit(10), and outputs an arrangement reference signal for informing a frame start point of the input data. The signal expanding unit(10) has the first delay unit(20), a multiplexing unit(30) and the second delay unit(40). The first delay unit(20) receives the first data, and outputs a parallel signal. The multiplexing unit(30) receives the output of the first delay unit(20) and the second data with two bits according to an 1 bit/2 bit mode selection signal, and multiplexes the output of the first delay unit(20) and the second data. The second delay unit(40) receives the output of the multiplexing unit(30), and outputs the parallel signal.
申请公布号 KR20040026228(A) 申请公布日期 2004.03.30
申请号 KR20020057605 申请日期 2002.09.23
申请人 LG ELECTRONICS INC. 发明人 CHO, HYEON SANG
分类号 H04L12/43;(IPC1-7):H04L12/43 主分类号 H04L12/43
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