发明名称 |
Method for fabricating a split gate flash memory cell |
摘要 |
A method for fabricating a split gate flash memory cell. First, a substrate having a doped region covered by a first conductive layer is provided. A floating gate and a first insulating layer are successively formed over the substrate on both sides of the first conductive layer. Thereafter, a conformable second insulating layer and a conformable second conductive layer are successively formed on the substrate and the first insulating layer, and then a third insulating layer is formed thereon. The third insulating layer and the second conductive layer are successively etched back to expose the second insulating layer. The third insulating layer is removed using a cap layer formed on the second conductive layer as a mask to form an opening. Finally, the second conductive layer under the opening is removed to form a control gate underlying the cap layer.
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申请公布号 |
US6713349(B2) |
申请公布日期 |
2004.03.30 |
申请号 |
US20030426347 |
申请日期 |
2003.04.30 |
申请人 |
NANYA TECHNOLOGY CORPORATION |
发明人 |
LIN CHI-HUI;HUANG CHUNG-LIN |
分类号 |
H01L21/8247;H01L27/115;(IPC1-7):H01L21/336 |
主分类号 |
H01L21/8247 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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