发明名称 Method of testing a semiconductor memory device
摘要 A method for testing a semiconductor memory device according to one embodiment comprises the steps of: checking data in all addresses of the semiconductor memory device for correctness in-units of mxn bits: ending if it is determined that data in all the semiconductor memory device; if there is a defective address, comparing each m-bit data constituting the (mxn)-bit data corresponding to the defective address with its expected value; and if the comparison result indicates that the m-bit data is erroneous, determining whether the defective semiconductor memory device can be repaired. Due to this step, man hours required for testing a semiconductor memory device having a wide data bus of an (mxn)-bit width can be considerably reduced.
申请公布号 US6715117(B2) 申请公布日期 2004.03.30
申请号 US20010761847 申请日期 2001.01.18
申请人 RENESAS TECHNOLOGY CORP. 发明人 MANGYO ATSUO;MIURA MANABU;HATAKENAKA MAKOTO
分类号 G01R31/28;G11C29/08;G11C29/44;G11C29/48;G11C29/56;(IPC1-7):G11C29/00 主分类号 G01R31/28
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