| 摘要 |
A plurality of nonvolatile memory cells having gates connected to a same word line, respectively, are connected in series, and connected to adjacent bit lines, respectively. When data is sequentially written to the plurality of nonvolatile memory cells, a bit line select circuit sequentially supplies a write potential outputted from a predetermined potential generation circuit to a plurality of bit lines. The bit line to which the write potential has been supplied once is kept to have the potential. Due to this, this nonvolatile semiconductor memory device can reduce an area occupied by a memory cell array.
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