| 摘要 |
A preamplifier includes an amplifier circuit amplifying a signal level of read data, a latency shifter outputting the read data onto a data line pair in response to an internal signal determining a timing of outputting the read data onto the data bus pair, and a driver outputting the read data onto the data bus pair. The amplifier circuit receives the internal signal and outputs the read data onto the data line pair while bypassing the latency shifter when the internal signal is already at high level at the timing when the signal level of the read data is amplified. As a result, a semiconductor memory device can speed up propagation of the read data from the preamplifier onto the data bus pair in a high frequency operation.
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