METHOD FOR FORMING SILICIDE GATE LINE USING SEMICONDUCTOR DUAL DAMASCENE STRUCTURE

摘要

PURPOSE: A method for forming a silicide gate line using a semiconductor dual damascene structure is provided to form silicide of a uniform thickness and reduce silicide resistance by forming unevenness on top polysilicon where silicide is to be formed by deposition and etch processes for a nitride layer and an oxide layer and a polysilicon chemical mechanical polishing(CMP) process. CONSTITUTION: A tunneling oxide layer(2) is deposited on a silicon substrate(1). A nitride layer(6) and an oxide layer are deposited on the tunneling oxide layer. After photoresist is formed on the oxide layer, a gate pattern is formed. The oxide layer and the nitride layer are etched. Polysilicon(3) is deposited in the hole line of the oxide layer and the nitride layer. A CMP process is performed to remove the remaining polysilicon on the oxide layer. A gate pattern formation process is performed to form a final gate line. A sidewall deposition process and an etch process are performed to form a sidewall nitride layer(4) on the gate line. After the oxide layer on the polysilicon is eliminated, a silicide material is deposited in the space from which the oxide layer is removed. After final silicide is formed by an annealing process, a cleaning process is performed to eliminate unreacted silicide.