RECEIVER FOR DIGITAL VIDEO SIGNAL

摘要

PROBLEM TO BE SOLVED: To establish new synchronism at high speed when an inputted video signal is switched, and to stably hold synchronism even when a transmission error occurs. SOLUTION: The receiver is composed of: an EAV detecting circuit 105 for detecting an inputted digital video signal EAV from its first word to its third word and reporting a timing thereof; a horizontal synchronism protecting circuit 1 for generating a horizontal synchronizing signal on the basis of the timing; an FV bit detecting circuit 3 for detecting and outputting the values of F bits and V bits of the input video signal on the basis of the horizontal synchronizing signal; and a vertical synchronism protecting circuit 2 for generating a vertical synchronizing signal on the basis of the output values of the FV bit detecting circuit. The horizontal synchronism protecting circuit 1 resets an internal counter only when a pulse is inputted to the same position continuously for three lines, and the vertical synchronism protecting circuit 2 loads the value of a line number generated on the basis of the values inputted from the FV bit detecting circuit 3 to an internal counter only when the phase of the horizontal synchronizing signal is changed. COPYRIGHT: (C)2004,JPO