发明名称 Improvements in or relating to semiconductor devices
摘要 <p>968,106. Semi-conductor devices. GENERAL ELECTRIC CO. Ltd. July 4, 1962 [July 12, 1961], No. 25243/61. Drawings to Specification. Heading H1K. A semi-conductor device incorporates a wafer containing a plane PN junction parallel to the main faces of the wafer and formed between a first layer of one conductivity type and a second layer of the opposite conductivity type, the net significant impurity concentration in said first layer being greater than that in said second layer: there is present on the surface of the wafer a net electrostatic charge which is of the same polarity as the majority carriers in said first layer, and the surface of the wafer is bevelled at least in the region where the PN junction meets the surface in such a manner that the surface of the second layer contiguous with the junction makes an included angle of between 170 degrees and 180 degrees with the plane of the junction. It is stated that the surface charge on germanium devices is apparently dependent on the nature of the surrounding atmosphere, electronegative gases such as oxygen or ozone producing a negative surface charge while water vapour produces a positive arc. Thus the desired surface charge may be obtained by encapsulating the device in a suitable atmosphere. The charge on silicon devices is much less sensitive to the surrounding atmosphere and is normally positive. A silicon wafer for a silicon controlled rectifier, Fig. 5 (not shown), is also described in Specification 968,353, and may be produced by a lapping method also described in Specification 968,105. An etching method for producing the bevel is described with reference to the manufacture of a diode rectifier. A silicon wafer of N- type conductivity is provided with an allround diffused surface layer of gallium doped P-type material. One face is lapped so that the wafer contains only a single PN junction. A disc is cut from the slice and a circle of wax deposited on its P-type face leaving an annular outer region unmasked. The wafer is immersed for 5 to 9 minutes in a " slow " etch containing specified amounts of nitric, hydrofluoric, acetic, and phosphoric acids. This etch preferentially attacks the low resistivity P-type material and forms a shoulder such that the newly-formed surface subtends an angle of about 5 degrees with the plane of the junction. Ohmic contacts are applied in a conventional manner and the diode hermetically sealed in an envelope.</p>
申请公布号 GB968106(A) 申请公布日期 1964.08.26
申请号 GB19610025243 申请日期 1961.07.12
申请人 THE GENERAL ELECTRIC COMPANY LIMITED 发明人 KNOTT RALPH DAVID;WADHAM ERIC
分类号 H01L21/00;H01L21/304;H01L21/60;H01L23/488;H01L29/00;H01L29/06 主分类号 H01L21/00
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