发明名称 Multiple chip system including a plurality of non-volatile semiconductor memory devices
摘要 A multiple chip memory system capable of providing state information relating to each chip embedded therein. The multiple chip memory system includes a first chip enabled by a first chip selection signal, and informing of a self state by a first ready/busy signal; and a second chip enabled by a second chip selection signal, and informing of a self state by a second ready/busy signal.
申请公布号 US2004057297(A1) 申请公布日期 2004.03.25
申请号 US20030618206 申请日期 2003.07.09
申请人 JANG CHEOL-UNG;CHOI YOUNG-JOON 发明人 JANG CHEOL-UNG;CHOI YOUNG-JOON
分类号 G06F12/06;G11C16/00;G11C16/20;(IPC1-7):G11C29/00 主分类号 G06F12/06
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