| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a memory structure of low power consumption capable of arranging a further memory array on a single substrate. <P>SOLUTION: An electrically addressable data storage unit 80 has a matrix consisting of rows and columns of a plurality of data storage arrays 81 to 89 on a single substrate 90. Each array 14 is a matrix of a plurality of coplanar data storage diode cells 16 connected by row lines 18 and column lines 20 for data recording, addressing and data reading. The address lines 91, 92, 97 and 98 and power lines 104-106 and 120-122 of the plurality of arrays 81 to 89 are respectively connected to the arrays 81, 84, 87, 87, 88 and 89 so that only the data storage cells in the array 87 of a selected data storage cell 150 can be used, thereby eliminating undesirable power consumption in all other arrays of the data storage unit. <P>COPYRIGHT: (C)2004,JPO</p> |
