Integrated circuit with transistor array of vertical FET selection transistors has array diagnosis test structure with two offset word, bit line combs alternately connecting different word, bit lines

摘要

The integrated circuit has a transistor array of vertical FET selection transistors and storage capacitors in deep trenches for an array of semiconducting cells associated with the transistor array, word lines and intersecting parallel bit lines. An array diagnosis test structure has first and second offset word line combs alternately connecting different word lines and first and second bit line combs alternately connecting different bit lines. The integrated circuit has a transistor array (11) of vertical FET selection transistors formed by active elements (121-12k) in the form of parallel vertical trenches in a substrate and storage capacitors in deep trenches for an array of semiconducting cells associated with the transistor array, word lines (131-13k) along the active elements and intersecting parallel bit lines (141-14m). An array diagnosis test structure contains first and second offset word line combs (20,21) alternately connecting different word lines and first and second bit line combs (30,31) alternately connecting different bit lines.