发明名称 |
SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD |
摘要 |
PROBLEM TO BE SOLVED: To decrease the manufacturing cost of a semiconductor device which uses a compound semiconductor. SOLUTION: A storage MISFET comprises a high resistance SiC layer 102 epitaxially grown on a SiC wafer 101, a P-type well region 103, an n-type storage channel layer 104 having a multipleδdope layer formed on the surface region of the region 103, a contact region 105, a gate insulation film 108, and a gate electrode 110. The layer 104 has a structure in which an undoped layer 104b and aδdope layer 104a where the carriers can leach to the layer 104b by the quantum effect are alternately laminated. A source electrode 111 which enter the layer 104 and the region 105 to directly contact the region 105. As any source region formed by ion implantation is not required, the manufacturing cost is decreased. COPYRIGHT: (C)2004,JPO |
申请公布号 |
JP2004096061(A) |
申请公布日期 |
2004.03.25 |
申请号 |
JP20030021692 |
申请日期 |
2003.01.30 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
KUSUMOTO OSAMU;KITAHATA MAKOTO;TAKAHASHI KUNIMASA;YAMASHITA MASAYA;MIYANAGA RYOKO;UCHIDA MASAO |
分类号 |
H01L21/28;H01L21/04;H01L21/336;H01L21/338;H01L21/82;H01L21/822;H01L21/8232;H01L21/8234;H01L27/04;H01L27/06;H01L27/095;H01L29/12;H01L29/24;H01L29/36;H01L29/45;H01L29/47;H01L29/772;H01L29/78;H01L29/812;H01L29/872;(IPC1-7):H01L21/28;H01L21/06;H01L21/823 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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