发明名称 VERTICAL INSULATED GATE FIELD-EFFECT TRANSISTOR
摘要 PROBLEM TO BE SOLVED: To facilitate design of a breakdown voltage of a bidirectional Zener diode which is formed from a diffusion layer on the same chip as a diode for protecting a power MOSFET. SOLUTION: In an N<SP>-</SP>drain area 1, a P-type voltage resistant area 14is formed simultaneously with a P well 13, and a P-type diffusion layer 3 and an N<SP>+</SP>-type diffusion layer 4 are formed simultaneously with a P base area 5 and an N<SP>+</SP>source area 6. Then, a bidirectional Zener diode Z<SB>DG</SB>connected between a drain and a gate is composed of an N<SP>+</SP>drain area 2, the P-type voltage resistant area 14 and the P-type diffusion layer 3, and the N<SP>+</SP>-type diffusion layer 4. COPYRIGHT: (C)2004,JPO
申请公布号 JP2004095694(A) 申请公布日期 2004.03.25
申请号 JP20020252242 申请日期 2002.08.30
申请人 NEC KANSAI LTD 发明人 MURAKAMI TOSHIAKI
分类号 H01L27/04;H01L29/78;(IPC1-7):H01L29/78 主分类号 H01L27/04
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