发明名称 PROCESSING METHOD OF SEMICONDUCTOR WAFER
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a method, which is improved in comparison with the background technologies, for processing a front side and a back side of a wafer to a degree of a flat and defectless plane. <P>SOLUTION: In the case of processing a semiconductor wafer, which has defined front and back sides being previously processed through a lapping stage and includes a lap damage on the back side, the method comprises the steps of: grinding the back side of the wafer to remove wafer material, to substantially eliminate the lap damage; after the step of back side grinding, sequentially polishing the back side and the front side of the wafer. After deposition of an epitaxial layer, wafers processed in accordance with this method exhibit HCT levels of less than 22 nm in the 2×2 bin and less than 70 nm in the 10×10 bin. <P>COPYRIGHT: (C)2004,JPO</p>
申请公布号 JP2004096112(A) 申请公布日期 2004.03.25
申请号 JP20030307428 申请日期 2003.08.29
申请人 WACKER SILTRONIC AG 发明人 HARRISON WESLEY;GORE DAVID;VANDAMME ROLAND
分类号 B24B1/00;B24B37/00;H01L21/301;H01L21/302;H01L21/304;H01L21/306;H01L21/46;H01L21/78;(IPC1-7):H01L21/304 主分类号 B24B1/00
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