The present invention relates to a high-speed adaptive equalizer that is composed of an analog and a digital circuitry to implement an LMS (Least Mean Square) adaptive signal processing algorithm. A part that must process at high speed is implemented with the analog circuitry while a part that is sensitive to noise is implemented with the digital circuitry.
申请公布号
WO2004025917(A1)
申请公布日期
2004.03.25
申请号
WO2003KR00894
申请日期
2003.05.06
申请人
BERKANA WIRELESS KOREA INC.;BYUN, SANG JIN;JUN, HYUN DUK;KIM, HYUN JIN;KIM, JIN WOOK;YANG, JEONG SIK;KIM, TAE SUNG;MIN, BYUNG JUN
发明人
BYUN, SANG JIN;JUN, HYUN DUK;KIM, HYUN JIN;KIM, JIN WOOK;YANG, JEONG SIK;KIM, TAE SUNG;MIN, BYUNG JUN
