| 摘要 |
PROBLEM TO BE SOLVED: To realize a memory test circuit capable of changing test contents by adding necessary minimum external terminals for a test and a circuit. SOLUTION: This memory test circuit is provided with: signal generating circuits for respectively generating a CS signal, an address signal, a data signal and an R/W signal of a memory to be tested; and a test setting control circuit for generating the control data of these signal generating circuits. The signal generating circuits and the test setting control circuit have shift registers, and control data and test data are serially inputted to these shift registers from external terminals. COPYRIGHT: (C)2004,JPO
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