发明名称 |
SPEED AND MEMORY OPTIMISED INTERLEAVING |
摘要 |
<p>This invention relates to a method for interleaving, according to an interleaving scheme, an input sequence comprising K bits into an interleaved sequence, comprising the steps of (a) storing the input sequence in a first memory means, (b) generating first indices of N succeeding bits of the interleaved sequence, wherein 1 m(F) N m(F) K, (c) converting, according to an inverse of said interleaving scheme, said first indices into second indices indicative of the positions where said N succeeding bits of the interleaved sequence are stored in said first memory means, and (d) reading out said N succeeding bits from said positions in said first memory means, thereby generating at least part of said interleaved sequence.</p> |
申请公布号 |
WO2004025839(A1) |
申请公布日期 |
2004.03.25 |
申请号 |
WO2002EP10073 |
申请日期 |
2002.09.09 |
申请人 |
TELEFONAKTIEBOLAGET LM ERICSSON (PUBL);KUKLA, RALF;SCHUETZ, STEFAN;SPOERLEIN, GEORG;MOERSBERGER, GERD |
发明人 |
KUKLA, RALF;SCHUETZ, STEFAN;SPOERLEIN, GEORG;MOERSBERGER, GERD |
分类号 |
H03M13/27;H03M13/29;H04L1/00;(IPC1-7):H03M13/27 |
主分类号 |
H03M13/27 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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