发明名称 method of generating an interleave pattern for work loads in an array of processing elements.
摘要 <p>A method of determining an interleave pattern for n lots of A and y lots of B, when n plus y equals a power of two such that the expression 2<z>-n may be used to represent the value of y, is comprised of generating a key comprised of the reverse bit order of a serially indexed count from 0 to 2<z>. An interleave pattern can be generated from the key in which all values less than n are replace by A and all other values are replaced by B. In cases where n plus y does not equal a power of two, the method is comprised of selecting a value of 2<z> where, preferably, (n + y) < 2<Z> < 2(N + Y). A list is created in which the entries are comprised of the reverse bit order of a serially indexed count from 0 to 2<z>. A portion of the list is selected and renumbered to form a key. An interleave pattern can be generated from the key in which all values in the key less than n are replaced by A and all other values in the key are replaced by B. In both cases, the keys can be used to generate a table that contains all possible combinations of values of A and B. The table can then be stored such that an interleave pattern can be automatically selected based on either the number of lots of A or the number of lots of B. The pattern may be used in load balancing for an array of processing elements.</p>
申请公布号 GB2393288(A) 申请公布日期 2004.03.24
申请号 GB20030009211 申请日期 2003.04.23
申请人 * MICRON EUROPE LIMITED 发明人 MARK * BEAUMONT
分类号 G06F7/02;G06F9/305;G06F9/315;G06F9/46;G06F15/80;(IPC1-7):G06F9/46 主分类号 G06F7/02
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