发明名称 |
METHOD FOR FORMING VIA HOLE OF SEMICONDUCTOR DEVICE |
摘要 |
PURPOSE: A method for forming a via hole of a semiconductor device is provided to be capable of preventing misalignment between a metal line and the via hole. CONSTITUTION: Metal lines(22) are formed on a semiconductor substrate(21). An interlayer dielectric(23) is formed on the resultant structure. A hard mask(24) is formed on the interlayer dielectric. A groove is formed by etching the hard mask and portions of the interlayer dielectric using the first photoresist pattern. The first photoresist pattern is removed, and the second photoresist pattern having a relatively wide window is formed. A via hole(29a) is formed by etching the hard mask and the interlayer dielectric using the second photoresist pattern. The sidewall of the via hole(29a) is etched using the hard mask.
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申请公布号 |
KR20040025325(A) |
申请公布日期 |
2004.03.24 |
申请号 |
KR20020057249 |
申请日期 |
2002.09.19 |
申请人 |
HYNIX SEMICONDUCTOR INC. |
发明人 |
BAEK, GYE HYEON;PARK, GEUN JU |
分类号 |
H01L21/28;(IPC1-7):H01L21/28 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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