发明名称 Processors and compiling methods for processors
摘要 <p>A compiling method compiles an object program to be executed by a processor having a plurality of execution units operable in parallel. In the method a first availability chain is created from a producer instruction (p1), scheduled for execution by a first one of the execution units (20: AGU), to a first consumer instruction (c1), scheduled for execution by a second one of the execution units (22: EXU) and requiring a value produced by the said producer instruction. The first availability chain comprises at least one move instruction (mv1-mv3) for moving the required value from a first point (20: ARF) accessible by the first execution unit to a second point (22: DRF) accessible by the second execution unit. When a second consumer instruction (c2), also requiring the same value, is scheduled for execution by an execution unit (23: EXU) other than the first execution unit, at least part of the first availability chain is reused to move the required value to a point (23: DRF) accessible by that other execution unit. In other compiling methods (FIG. 8), the object program includes a loop kernel block and a basic block preceding the loop kernel block, and the basic block includes a producer instruction (p1) and the loop kernel block includes a consumer instruction (c1, c2) requiring a value produced by the producer instruction. The loop kernel block is scheduled first, after which the basic block is scheduled. These methods can put additional move instructions between producer and consumer instructions in the basic block instead of the loop kernel block, or eliminate the move instructions altogether.</p>
申请公布号 GB0403626(D0) 申请公布日期 2004.03.24
申请号 GB20040003626 申请日期 2001.10.12
申请人 PTS CORPORATION 发明人
分类号 G06F9/30;G06F9/318;G06F9/38;G06F9/44;G06F9/45 主分类号 G06F9/30
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