Scalable stack-type DRAM memory structure and its manufacturing methods

摘要

The scalable stack-type DRAM memory structure of the present invention comprises a scalable DRAM transistor structure and a scalable DRAM capacitor structure. The scalable DRAM transistor structure comprises a plurality of transistor-stacks, a plurality of common-drain regions, and a plurality of source regions being formed over a shallow-trench-isolation structure without a dummy-transistor structure by using a spacer-formation technique. The scalable DRAM capacitor structure comprises a plurality of rectangular tube-shaped cavities being formed over thin fourth conductive islands to form a high-capacity DRAM capacitor for each of DRAM cells; and a plurality of planarized conductive contact-islands over planarized third conductive islands being patterned and simultaneously etched with a plurality of bit-lines for forming a contactless DRAM memory. The cell size of a DRAM cell is scalable and can be made to be smaller than 6F<2>.