发明名称 |
Using a model specific register as a base I/O address register for embedded I/O registers in a processor |
摘要 |
A processor includes an input/output (I/O) register that is mapped into input/output (I/O) address space. The processor also includes a base address register that is loaded with a base address. The base address register may be a model specific register (MSR). The input/output register is accessed with an input/output instruction at an address determined according to the base address and an offset therefrom. The base address register may be accessible to software operating at a high privilege level and not accessible to software operating at a lower privilege level, while the I/O register is accessible to software operating at the lower privilege level. The processor determines when an I/O access is to the processor I/O register and accesses that I/O register without causing an input/output bus cycle that would otherwise occur.
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申请公布号 |
US6711673(B1) |
申请公布日期 |
2004.03.23 |
申请号 |
US20000477124 |
申请日期 |
2000.01.03 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
MITCHELL CHARLES WELDON;QURESHI QADEER AHMAD;CALDWELL DERVINN DEYUAL |
分类号 |
G06F9/30;G06F9/312;G06F9/318;G06F9/355;G06F12/14;(IPC1-7):G06F9/00;G06F12/00;G06F12/02 |
主分类号 |
G06F9/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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