| 摘要 |
PROBLEM TO BE SOLVED: To provide a power circuit which can reduce current consumption by stopping NMOS in case that load is low. SOLUTION: This power circuit possesses a DC-DC converting circuit (QP1, QN1, L1, and C0) which has a PMOS(QP1) and an NMOS(QN1) and gets PWM-controlled DC output voltage by turning them on alternately, an error amplifier 40 which gets an error signal by comparing the output voltage of the above DC-DC converting circuit with a reference voltage value, and PWM circuit means (31 and 32) which generate PWM signals with their pulse width controlled by the above error signal and supply them to each gate of the above DC-DC converting circuit. The above PWM circuit means has a duty ratio judging means which judges the magnitude of the duty ratio of the PWM signals to be supplied to the gate of the above PMOS (QP1), based on a reference value. When the above duty ratio is smaller(lighter in load) than the reference value, it stops the drive of the NMOS(QN1). At light load, this power circuit can reduce the current consumption of the NMOS(QN1). Furthermore, this circuit can prevent the occurrence of low frequency ripple by providing it with two reference values and making it have hysteresis. COPYRIGHT: (C)2004,JPO
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