| 摘要 |
PROBLEM TO BE SOLVED: To facilitate permutation of cells suitable for performance after a layout and wiring process of a semiconductor integrated circuit and dispense reworking for the layout and wiring process. SOLUTION: A logic composition means 1 produces a net list 11 based on RTL 10. A layout and wiring means 2 produces layout data 12 for manufacturing processes based on the net list 11. A permutation processing means 3 replaces information of layout and wiring without any change with a cell in which its logic and behavior are equivalent, when necessary to replace the cell by optimizing performance to the layout data 12 obtained through the layout and wiring means 2. Under these circumstances, modified layout data 14 are supplied to the manufacturing processes by referring the information 13 at a permuted place. COPYRIGHT: (C)2004,JPO
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