METHOD FOR PACKING ELECTRONIC MODULES AND MULTIPLE CHIP PACKAGING

摘要

The invention relates to a method for packing electronic modules, and to a multiple chip packaging (100). According to the invention, at least one power semiconductor chip (103) is applied to a base plate (101) using a first solder (105), at least one logical chip (102) is applied to the base plate (101), the logical chip and the base plate being arranged in such a way that they are electrically isolated from each other, at least one logical chip (102) is connected to the at least one power semiconductor chip (103) by means of signal transmission lines (104a-104e), and the electronic module consisting of the at least one power semiconductor chip (103) and the at least one logical chip (102) is packed by means of a moulding material (120) in order to provide a multiple chip packaging (100).