发明名称 |
Semiconductor device and method of manufacturing it |
摘要 |
To enable the reduction of ON-state resistance in a state in which the withstand voltage is secured, a semiconductor device according to the invention is provided with a gate electrode formed so that the gate electrode ranges from a gate oxide film formed on an N-type well region formed in a P-type semiconductor substrate to a selective oxide film, a P-type source region formed so that the source region is adjacent to the gate electrode, a P-type drain region formed in a position apart from the gate electrode and a P-type drift region (an LP layer) formed so that the drift region surrounds the drain region, and is characterized in that a P-type impurities layer (an FP layer) is formed so that the impurities layer is adjacent to the drain region.
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申请公布号 |
US2004051125(A1) |
申请公布日期 |
2004.03.18 |
申请号 |
US20030651855 |
申请日期 |
2003.08.29 |
申请人 |
SANYO ELECTRIC CO., LTD., A OSAKA, JAPAN CORPORATION |
发明人 |
KIKUCHI SHUICHI;NISHIBE EIJI |
分类号 |
H01L21/336;H01L21/8234;H01L27/088;H01L29/78;(IPC1-7):H01L21/336;H01L29/76;H01L31/062 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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