| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a carry selection type adder most suitable for the addition of multiple bits in coding technology, having a less number of circuits and a higher speed. <P>SOLUTION: The adder comprises a first XOR element using two data inputs, two carry inputs and a carry selection input as inputs for generating a XOR output of the two data inputs, a first multiplexer using the XOR output as a selection signal for selecting one of the first carry input and the first data input, a second multiplexer for selecting one of the second carry input and the second data input, a third multiplexer using the carry selection input as a selection signal for selecting one of the two carry inputs, and a second XOR element for generating a XOR output of both the output of the third multiplexer and the XOR output. The output of the first multiplexer is defined as the first carry output, the output of the second multiplexer as the second carry output, and the output of the third multiplexer as an additional value. <P>COPYRIGHT: (C)2004,JPO |
