METHOD FOR FABRICATING NON-VOLATILE MEMORY DEVICE WITH SIDEWALL GATE AND SILICON-OXIDE-NITRIDE-OXIDE-SILICON CELL STRUCTURE

摘要

PURPOSE: A method for fabricating a non-volatile memory(NVM) device with a sidewall gate and a silicon-oxide-nitride-oxide-silicon(SONOS) cell structure is provided to form an oxide-nitride-oxide(ONO) layer of a fine width and improve device integration by making the width of the ONO layer influenced by the thickness of a polysilicon layer stacked in a previous process without a photolithography process. CONSTITUTION: A vertical structure in which a tunneling layer pattern, a charge trap layer pattern and a blocking layer pattern are sequentially formed is formed on the first surface of a silicon substrate(302). A gate insulation layer is formed on the second surface of the substrate exposed by the vertical structure. A gate spacer is formed which protrudes from the upper surface of the vertical structure while contacting the upper side surface of the vertical structure over a partial surface of the gate insulation layer. A conductive layer for forming a gate is formed on the exposed surface of the vertical structure, the gate spacer and the gate insulation layer. A blanket etch process is performed on the conductive layer for forming the gate to form a gate electrode which exposes a partial surface of the vertical structure and a partial surface of the gate insulation layer. An etch process is performed by using the gate electrode as an etch mask to eliminate the vertical structure exposed by a control gate electrode. Impurity ions are implanted into the substrate exposed by the control gate electrode to form a source/drain region(304,306).