| 摘要 |
PROBLEM TO BE SOLVED: To provide a bus line switching circuit for switching bus lines without causing a through-current in the case of using tri-state inverters to switch data of different sets given to the bus lines. SOLUTION: When an input selection signal of an SEL 7 goes to a 'Hi' from a 'Lo', an output of an OR gate 12 shifts from the 'Lo' to the 'Hi' and the tri-state inverter 2 is disabled. When an output of a NAND gate 11 goes to the 'Lo' after a delay time of a delay buffer 13 after the input selection signal goes to the 'Hi', the tri-state inverter 3 is enabled. Since an inactive time exists in the tri-state inverters 2, 3 at switching, no through-current is produced between the tri-state inverters 2, 3. Further, when the input selection signal shifts from the 'Hi' to the 'Lo', the output of the NAND gate 11 goes to the 'Hi', the tri-state inverter 3 is disabled, and when the output of the OR gate 12 goes to the 'Lo', after the delay time of the delay buffer 13 after the input selection signal goes to the 'Lo', the tri-state inverter 2 is enabled. COPYRIGHT: (C)2004,JPO
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