| 摘要 |
A semiconductor memory device includes memory cells. The memory cell includes three P-channel MOS transistors. The first P-channel MOS transistor is connected between a bit line and a node, and receives on its gate terminal a voltage on a word line. The second P-channel MOS transistor has source and drain terminals connected to the node, and receives a cell plate voltage on its gate terminal. The third P-channel MOS transistor has a gate terminal connected to the node, and receives a cell plate voltage on its source and drain terminals.
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