| 摘要 |
A semiconductor wafer includes a plurality of chip areas having circuit elements, a scribe line area for defining the chip areas, and a plurality of test element group (TEG) modules. The TEG modules are group formed on the scribe line area. Each of the TEG modules has test transistors, a common source pad, and a common body pad. A global gate pad is commonly connected to gates of test transistors in the test element group modules. Global drain pads are shared by respective test transistors in the TEG modules. In other words, each drain pad is commonly connected to corresponding drains of test transistor in at least two TEG modules such that a drain pad is shared by plural TEG modules, considerably reducing an area occupied by each TEG module.
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