发明名称 |
Semiconductor memory and its driving method |
摘要 |
A ferroelectric memory of a 1T/1C type has a pair of dummy memory cells DMC2n-1 and DMC2n. Different information have been stored in the dummy memory cells. When the information is read out from each dummy memory cell, a potential Va is developed on a bit line BL2n-1, a potential Vb is developed on an adjacent bit line BL2n. Since the bit lines BL2n-1 and BL2n have the same capacitance, a potential Vave of each bit line which was short-circuited by a short-circuit portion s2a is equal to a just intermediate value (Va+Vb)/2 of the potentials Va and Vb. The potential Vave is applied to sense amplifiers SAn-1 and SAn as a reference potential.
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申请公布号 |
US6707701(B2) |
申请公布日期 |
2004.03.16 |
申请号 |
US20020290188 |
申请日期 |
2002.11.08 |
申请人 |
OKI ELECTRIC INDUSTRY CO., LTD. |
发明人 |
ASHIKAGA KINYA |
分类号 |
G11C11/22;(IPC1-7):G11C11/22;G11C11/24;G11C7/00;G11C7/02 |
主分类号 |
G11C11/22 |
代理机构 |
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