发明名称 METHOD FOR FORMING VERTICAL PROFILE BY USING DAMASCENE GATE
摘要 PURPOSE: A method for forming a vertical profile by using a damascene gate is provided to prevent a direct current(DC) fail by controlling critical dimension(CD) in an etch process of a nitride layer and by performing an implant process after the vertical profile is generated. CONSTITUTION: A gate oxide(20) is formed on a silicon substrate(10). An implant process is performed to form a lightly-doped-drain(LDD)(40). After a nitride layer is deposited and patterned, the nitride layer is etched according to gate CD. Poly is deposited. A damascene gate is formed even in a top area of nitride. After silicide(90) is formed in the damascene gate, a sidewall nitride etch process is performed to form a sidewall(100) by using high selectivity of the silicide and the nitride layer. A source/drain implant process is performed to form a source/drain.
申请公布号 KR20040022485(A) 申请公布日期 2004.03.16
申请号 KR20020054012 申请日期 2002.09.07
申请人 ANAM SEMICONDUCTOR., LTD. 发明人 KO, GWAN JU
分类号 H01L21/336;(IPC1-7):H01L21/336 主分类号 H01L21/336
代理机构 代理人
主权项
地址