| 摘要 |
A method for creating a layout of at least a portion of a microelectromechanical system is disclosed. In one embodiment, a plurality of die are formed on a wafer. Each die includes a plurality of rows of a plurality of mirror assemblies, a plurality of off-chip electrical contacts, and an electrical trace bus that is disposed between adjacent pairs of rows. This electrical trace bus is electrically interconnected with mirror assemblies in at least one of the rows. A plurality of these die are formed on a wafer. A chip is separated from the wafer such that a chip width is an integer multiple of the die width and such that a chip height is an integer number of the rows of mirror assemblies without requiring the chip height to be an integer multiple of the die height.
|
