发明名称 MANUFACTURING METHOD OF PACKAGING, SEMICONDUCTOR DEVICE AND PACKAGING
摘要 <P>PROBLEM TO BE SOLVED: To provide a manufacturing method which reduces the ground inductance of a packaging. <P>SOLUTION: The manufacturing method includes a step for forming a semiconductor device and a ground pad 11 for ground wiring of the semiconductor device in each of a plurality of semiconductor chip areas on a principal surface of a semiconductor wafer 1; a step for physically forming a separation groove 32 in a separation area for separating the plurality of semiconductor chip areas; a step for forming a ground metal layer 26 so as to be connected to the ground pad 11 of the semiconductor device in the separation groove 32; a step for polishing a rear surface of the semiconductor wafer until exposing the bottom of the separation groove, and separating the plurality of semiconductor chip areas in the separation groove 32 into independent semiconductor chips 21; a step for forming a conductive material on a ground provided on a front surface of a packaging board; and a step for packaging the semiconductor chips 21 on the conductive material so as to connect the metal layer 26 and the ground by the conductive material. <P>COPYRIGHT: (C)2004,JPO
申请公布号 JP2004079886(A) 申请公布日期 2004.03.11
申请号 JP20020240529 申请日期 2002.08.21
申请人 TOSHIBA CORP 发明人 SUGIYAMA TORU;MORITSUKA KOHEI;SUGIURA MASAYUKI;KURIYAMA YASUHIKO;TANABE YOSHIICHI
分类号 H01L23/12;H01L23/00;H01L23/485;H01L23/488 主分类号 H01L23/12
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