PREVENTION OF UNDESIRED EXTERNAL DETECTION OF OPERATIONS IN INTEGRATED DIGITAL CIRCUITS

摘要

The invention relates to a digital circuit (1) comprising asynchronous circuitry (2), in which the input voltage of the asynchronous circuitry (2) is varied using a random voltage jitter. The random modification of the input voltage causes a temporal jitter in the processing of the individual operations within the asynchronous circuitry, thus preventing individual measurements from being synchronised with the circuitry during side-channel attacks.