发明名称 SEMICONDUCTOR MEMORY
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a semiconductor memory in which power consumption can be suppressed. <P>SOLUTION: The transistor Qn20 of a previous cycle and the transistor Qn21 of a next cycle are multiple-selected for a fixed period by a column decoder control circuit 10 before the start of pre-charge. Electric charges charged in the bit line BLO of a previous cycle are distributed uniformly through the transistors Qn20 and Qn21. Consequently, quantity of electric charges being discharged is made 1/2, and power consumption can be reduced. <P>COPYRIGHT: (C)2004,JPO</p>
申请公布号 JP2004079075(A) 申请公布日期 2004.03.11
申请号 JP20020237818 申请日期 2002.08.19
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 ONO ATSUKO
分类号 G11C17/00;G11C16/06;G11C17/18;(IPC1-7):G11C17/00 主分类号 G11C17/00
代理机构 代理人
主权项
地址