发明名称 |
HIGH-SPEED PROGRAMMABLE SYNCHRONOUS COUNTER FOR USE IN A PHASE LOCKED LOOP |
摘要 |
A high-speed programmable synchronous counter is disclosed. The high-speed counter includes a most-significant-bit counter synchronized with a lease-significant bit counter. The least-significant-bit counter is programmed to an initial state and configured to decrement a state with each pulse of a clock wave. The least-significant-bit counter provides an output signal when the least-significant-bit counter has a zero-count state. The most-significant-bit counter decrements when the least-significant-bit counter has a zero-count state and provides an output signal when the least-significant-bit counter has a zero-count state. A counter output pulse is generated and the high-speed counter is reset to the initial state when both the least-significant bit counter and the most-significant bit counter have a zero-count state. |
申请公布号 |
WO02101930(A3) |
申请公布日期 |
2004.03.11 |
申请号 |
WO2002US16329 |
申请日期 |
2002.05.22 |
申请人 |
INFINEON TECHNOLOGIES AG |
发明人 |
CYRUSIAN, SASAN;RUEGG, MICHAEL, A. |
分类号 |
G11B5/012;G11B5/09;G11B20/14;H03K23/66;H03L7/183 |
主分类号 |
G11B5/012 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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