发明名称 |
GATE ELECTRODE AND ITS FABRICATING METHOD |
摘要 |
<p>A method for fabricating a micro gate electrode by reducing the dimensions of an opening formed by a conventional electron beam lithography by increasing the thickness of the opening. The method comprises a multilayer resist forming step of forming a multilayer resist including an electron beam resist layer as a lowermost layer on a gate electrode forming surface, an opening forming step of forming an opening extending through the other layers than the lower most layer, a gate electrode opening forming step of forming an opening for a gate electrode in the lowermost layer, a gate electrode opening reducing step of selectively reducing the opening for the gate electrode, and a gate electrode forming step of forming the gate electrode in the opening for the gate electrode. The gate electrode opening reducing step of a preferable mode is such that a material for increasing the thickness of a resist pattern is applied to the surface of the lowermost layer at least once to reduce the dimensions of the opening for the gate electrode. Another preferable mode includes an electron beam directing step of directing an electron beam to the vicinity of the opening for the gate electrode before the gate electrode opening reducing step.</p> |
申请公布号 |
WO2004021450(A1) |
申请公布日期 |
2004.03.11 |
申请号 |
WO2003JP09865 |
申请日期 |
2003.08.04 |
申请人 |
FUJITSU LIMITED;MAKIYAMA, KOZO;NOZAKI, KOJI |
发明人 |
MAKIYAMA, KOZO;NOZAKI, KOJI |
分类号 |
H01L21/027;G03F7/40;H01L21/28;H01L21/338;H01L29/423;H01L29/812;(IPC1-7):H01L29/80 |
主分类号 |
H01L21/027 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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