| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor device where the collector resistance of a bipolar transistor manufactured in a CMOS complete compatible BiCMOS process using a p-type silicon substrate can be reduced, and to provide a manufacturing method of the device. SOLUTION: In the vertical bipolar transistor, a collector well 102, a p-well implantation layer 106 and a base layer 101 which are formed by ion implantation are installed on a p-type silicon substrate 105 where STI 108 is formed between an element separation region/collector take-out region and the base layer. A high concentration implantation layer 103 whose impurity concentration is higher than that of the collector well 102 is arranged in STI108 except for a part immediately below the base layer 101 in the collector well 102 and in the collector pull-out region. Thus, collector resistance is reduced without an increase in capacity between collector bases and the deterioration of breakdown voltage and without an increase in capacity between collector substrates by the high concentration implantation layer 103. COPYRIGHT: (C)2004,JPO
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