| 摘要 |
PURPOSE: A RAM testing device is provided, which is capable of judging an error state of a RAM exactly so as to improve an error testing property by inputting test data generated with a simple circuit to the RAM and testing the RAM according to an input result. CONSTITUTION: A test signal generating part(2) generates and output a pseudo-random bit sequence(PRBS) pattern signal for detecting an error of a RAM(1). An address generating part(3) adds an input address signal to the pattern signal and generates an output address signal delayed by one address selected from outputs of the RAM. A RAM control signal generating part(4) generates control signals of the RAM in synchronization with an address signal of the address generating part(3). A comparator(5) compares an input test signal of the test signal generating part and a pattern signal of the RAM loaded on an output address signal of the output address signal of the address generating part(3) and outputs an operation error judgment signal of the RAM.
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