| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a data processor having a large number of operation modes, while increasing mode terminals, without reducing effective terminals, and while eliminating a setting operation for a register means to prevent erroneous rewriting of the register means. <P>SOLUTION: This processor is a single chip micro-computer formed as a semiconductor integrated circuit on one semi-conductor substrate, and constituted of functional blocks of a central processing unit CPU, a system controller SYSC, an interrupt controller INT, a reading-only memory ROM, a random access memory RAM, a timer, a serial communication interface SCI, the first to the 8th input-output ports IOP1-8, and a clock oscillator CPG. The operation mode is automatically read in in an hardware-like initialization operation after a start of an operation for the micro-computer, and the operation mode is automatically set in a register. <P>COPYRIGHT: (C)2004,JPO</p> |
