| 摘要 |
PROBLEM TO BE SOLVED: To provide a simulation method and simulation system of instruction scheduling capable of quickly and highly precisely executing instruction scheduling at executing the performance evaluation or operation verification of the software of a system including a high speed processor such as a developed SOC by machine cycle units by simulation. SOLUTION: An instruction column to be simulated is successively fetched and previously executed by an instruction emulator 1, and the execution result is stored in a recording part 2 of an execution log. When a loop is included in the execution log, and the status prior to this time scheduling of an instruction scheduler 3 is matched with the previous registration status of a calculation reuse engine 4, the instruction scheduling process is skipped. COPYRIGHT: (C)2004,JPO
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