发明名称 FLASH MEMORY DEVICE HAVING DECODER CAPABLE OF REDUCING LAYOUT AREA AND EXECUTING OPERATION INDEPENDENTLY FOR EVERY BANK
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a flash memory device having a decoder capable of reducing the layout area and executing operations independently for every bank. <P>SOLUTION: This memory device comprises banks, global decoders, and local decoders of many pieces. The global decoders are positioned at each matrix block divided in the direction of row arrangement of banks in which a plurality of memory cells are arranged, and generates a global reading signal and a global writing signal responding respectively to a read address signal and a write address signal. The local decoders are positioned at each sector in the matrix blocks, transmits a global read signal to a word line enable signal responding to a reading sector selecting signal, transmits the global write signal to the word line enable-signal responding to a writing sector selecting signal, and transmits a word line drive signal to a word line responding to a word line enable-signal. <P>COPYRIGHT: (C)2004,JPO</p>
申请公布号 JP2004079161(A) 申请公布日期 2004.03.11
申请号 JP20030286360 申请日期 2003.08.05
申请人 SAMSUNG ELECTRONICS CO LTD 发明人 NAN KASHAKU;RI SHOKON
分类号 G11C16/06;G11C8/10;G11C8/12;G11C16/08;(IPC1-7):G11C16/06 主分类号 G11C16/06
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