发明名称 SEMICONDUCTOR DEVICE AND SYSTEM
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a semiconductor device which of automatically corrects AC timing chip by chip after substrate packaging, and materializes the AC timing suitable for a packaging environment by enabling freely changing the AC timing after actual chip completion, and enables automatically correcting variable delay amount, and also to provide a system packaged with the semiconductor device. <P>SOLUTION: An LSI1 comprises a clock regenerating circuit 17 regenerating an inner clock signal by inputting a clock signal from the outside, an inputting/outputting circuit 12 inputting/outputting a data signal to the outside, and a phase adjusting circuit 18 adjusting a relative phase between the inner clock signal regenerated by the clock regenerating circuit 17 and the data signal inputted/outputted by the inputting/outputting circuit 12. A CPU 2 is connected to the outside of the LSI1, and the AC timing is freely changed even after actual chip completion between the LSI1 and the CPU2. In addition, variable delay amount is automatically corrected. <P>COPYRIGHT: (C)2004,JPO</p>
申请公布号 JP2004078660(A) 申请公布日期 2004.03.11
申请号 JP20020239198 申请日期 2002.08.20
申请人 RENESAS TECHNOLOGY CORP 发明人 SATO YOSHIO;HARA HIROTAKA;YAMAGISHI KAZUSHIGE
分类号 G06F1/10;G06F1/12;(IPC1-7):G06F1/10 主分类号 G06F1/10
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