| 摘要 |
PROBLEM TO BE SOLVED: To provide a processor operated in response to a instruction set containing a plurality of commands. SOLUTION: This processor 50 includes the integer number S of sub-units 54<SB>1</SB>, 54<SB>2</SB>, 54<SB>3</SB>, where the S is an integer greater than 1. Each of the sub-units is operable to execute at least one of the instructions set in response to at least two data arguments A, B, during an execution cycle. The processor includes circuitry 58<SB>A1'</SB>, 58<SB>A2'</SB>, 58<SB>A3'</SB>, 58<SB>B1'</SB>, 58<SB>B2</SB>for providing updated values of the at least two data arguments numbers to less than all S of the sub-units, for a single execution cycle. COPYRIGHT: (C)2004,JPO |
