| 摘要 |
PURPOSE: An apparatus for maintaining a duty ratio of a delay locked loop circuit is provided to reduce a malfunction due to a jitter by correcting the duty ratio of an internal clock signal. CONSTITUTION: An apparatus for maintaining a duty ratio of a delay locked loop circuit includes a clock divider(20), a delay locked loop(21), and a clock synthesizer(22). The clock divider(20) is used for dividing an internal clock signal into the first clock signal and the second clock signal synchronized with a rising edge and a falling edge. The delay locked loop(21) is used for delaying the first clock signal and the second clock signal during the predetermined period and outputting the first clock delay signal and the second clock delay signal. The clock synthesizer(22) is used for generating a clock signal having the same duty ratio as the internal clock signal by synthesizing the first clock delay signal with the second clock delay signal.
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