发明名称 Semiconductor memory device including data bus pairs respectively dedicated to data writing and data reading
摘要 During a burn-in test, each read selection gate, each write selection gate, a write control circuit, and a sense amplifier circuit are activated, and a read data bus precharge and equalize circuit and a global read data bus precharge and equalize circuit are inactivated. As a result, a voltage difference applied between a global write data bus pair is transferred to each of a write data bus pair, a bit line pair, a read data bus pair, and a global read data bus pair without involving a mode switching.
申请公布号 US6704238(B2) 申请公布日期 2004.03.09
申请号 US20020223292 申请日期 2002.08.20
申请人 RENESAS TECHNOLOGY CORP. 发明人 IZUTSU TAKASHI;OHBAYASHI SHIGEKI;KASHIHARA YOJI
分类号 G01R31/30;G01R31/28;G11C11/413;G11C29/06;G11C29/12;(IPC1-7):G11C8/00 主分类号 G01R31/30
代理机构 代理人
主权项
地址